1. Field of the Invention
The present invention relates to a method of establishing bit synchronization in a data transmitting/receiving system in which bit synchronization is necessary.
2. Description of the Prior Art
In recent years, a wired or wireless data transmitting/ receiving system has been eagerly developed. Generally in the data transmitting/receiving system, the bit synchronization is necessary in order to sample data correctly from a received signal.
In the conventional data transmitting/receiving system, such bit synchronization has been performed by means of hardware, i.e. by use of a bit synchronization circuit. As an example, a bit synchronization circuit disclosed in Japanese laid-open patent application No. 55-102953 will be explained hereinafter.
Plural counter circuits divide frequency of a fundamental clock, thereby generating respectively bit synchronous codes. The counter circuits are reset successively in response to successive edges of an input waveform, whereby time information about edges gf the input waveform is memorized in the counter circuits. The center edge among the detected edges on time-axis is regarded as a correct edge and made to be a reference edge. On the basis of that reference edge, a sampling signal is generated.
In the case of the system composed of hardware as mentioned above, however, a size of the system becomes large an so it is not suitable for the application to a portable equipment. Further it is difficult to carry out the above-mentioned method as it is by means of software, because of the necessity of the multiple counter operation.